74LV triple NAND — supply range and speed profile
The SN74LV10AD is a triple 3-input NAND gate from TI's 74LV low-voltage logic family, operating from 2V to 5.5V. It delivers a maximum propagation delay of 7.9ns at 5V with a 50pF load, making it suitable for glueless bus interfacing in mixed-voltage 3.3V/5V systems where the 74LVC series would be overkill. Each of the three independent gates sinks or sources 12mA at the output, enough to drive a single standard CMOS load or a short PCB trace without a buffer. The 20 µA quiescent current keeps the power budget tight in battery-backed or always-on sections.
Housed in a 14-SOIC narrow-body (3.90mm width) with a 1.27mm pitch, the SN74LV10AD uses the same footprint as the 74HC and 74HCT series in the same package — no board spin needed if swapping between families. Surface-mount only; the Tube packaging suits hand-assembly or low-volume pick-and-place. Input thresholds are set at 0.5V (low) and 1.5V (high), which are compatible with both 3.3V LVCMOS and 5V TTL logic families without external level translation.
It is ROHS3 compliant, and no PCN or last-time-buy notice is currently published for this order code.