Quad 2-input NAND in a 14-pin DIP — the workhorse logic gate
The SN74LS37N is a Texas Instruments 74LS-series quad 2-input NAND gate in a 14-DIP through-hole package. Four independent NAND circuits share a common 4.75V to 5.25V supply rail, each with two inputs. The 24ns max propagation delay at 5V into 45pF sets the timing budget for a 5V logic bus running at moderate clock rates — each gate's output settles within one 41 MHz clock period.
Output drive and what it means for fan-out
The output stage sources 1.2 mA and sinks 24 mA. The 24 mA sink current is the stronger half — it drives up to 10 standard LS-TTL loads (each loading the output with 2.4 mA in the low state) without exceeding the rated output voltage. The source side is lighter: 1.2 mA drives about 4 LS-TTL loads. For a bus with mixed logic families, the fan-out calculation should use the sink current as the limiting factor. Input logic thresholds are 0.8V for a low and 2V for a high, standard for the 74LS family. The 0.8V low threshold provides 0.4V of noise margin below a typical 1.2V output low, adequate for backplane or PCB traces in a controlled 5V environment.
Not specified for extended industrial or automotive ambient; the 74LS family's bipolar process draws more quiescent current than CMOS alternatives, so thermal rise in a densely populated board should be checked against the 70°C ceiling.