Single 8-input NAND in a 14-pin DIP
The SN74LS30N is a single 8-input NAND gate from the 74LS Schottky TTL family, packaged in a 14-pin DIP (0.300" body width) for through-hole mounting. It takes eight logic inputs and outputs the NAND result — a single LOW when all inputs are HIGH, otherwise HIGH. This is a classic wide-input decode gate, used in address decoding, data-path gating, or any logic where you need to detect an all-ones condition on an 8-bit bus.
Supply and logic levels — TTL compatibility
Input LOW threshold is 0.8 V max, input HIGH threshold is 2 V min — standard TTL levels. Outputs source 400 µA and sink 8 mA. Propagation delay is 20 ns at 5 V, 15 pF.