The SN74HCT74DR: You can spec it into a new design without worrying about a forced migration mid-production. ROHS3 compliant — no exemption issues for EU or California market boards.
Key specs that decide the fit
Dual D-type flip-flop with set and reset, positive-edge triggered, complementary outputs. Each element stores one bit, so the package gives you two independent flip-flops in the 14-SOIC footprint. Clock frequency tops out at 46 MHz — fast enough for most glue-logic and state-machine applications in the 5 V logic domain. The 18 ns max propagation delay at 5.5 V and 50 pF load sets the timing budget for cascaded stages. Quiescent current is 4 µA, so the standby power draw is negligible in battery-backed or always-on sections. Output drive is 4 mA source and sink — enough to drive a single LS load or a CMOS input, but not a bus or LED directly.
Package and board integration
14-SOIC (3.90 mm width) — the standard narrow-body SOIC footprint. Surface-mount only; no through-hole option in this order code. Input capacitance is 3 pF — light load on the driving gate. No exposed thermal pad; the standard SOIC package dissipates through the leads and board copper.