It operates from a 4.5 V to 5.5 V supply and is specified over the industrial temperature range of -40°C to 85°C. Each of the four gates can source or sink 4 mA, and the part draws a maximum quiescent current of 2 µA. Typical applications include glue logic in industrial control boards, signal gating in telecom line cards, and general-purpose combinational logic in 5 V systems where HCT-level input thresholds (low at 0.8 V, high at 2 V) are needed for TTL compatibility.
The maximum propagation delay is 22 ns at 5.5 V with a 50 pF load. In a 5 V system clocked at 20 MHz (50 ns period), that delay eats about 44% of the cycle — fine for a single gate stage, but you will want to budget it if the signal passes through multiple OR gates in series. The 4 mA output drive is enough for fan-out to four or five standard LSTTL loads, but not for driving a long backplane trace without a buffer.
14-TSSOP — footprint and handling
The 14-TSSOP package (4.40 mm width, 0.173" pitch) is a common fine-pitch SOIC variant. It is surface-mount only — no socket option for field swapping. The 0.65 mm lead pitch means a standard reflow profile works, but the fine pitch calls for a solder stencil with good aperture alignment.