Automotive-grade dual D-type flip-flop with set and reset
The SN74HCS72QDRQ1 is a dual 2-bit D-type flip-flop from Texas Instruments' 74HCS series, qualified to AEC-Q100 Grade 1 for automotive applications. Each flip-flop has independent Set (Preset) and Reset inputs, and the outputs are complementary — both Q and Q̅ are available. The negative-edge trigger means the data on the D input is transferred to the output on the falling edge of the clock, which is useful when the preceding stage's data settles before the clock goes low.
Parametric fit for 12V and battery-backed automotive ECUs
The 2V to 6V supply range covers both 3.3V and 5V nominal rails, plus the 2V margin near battery brown-out. Quiescent current is 2 µA typical — low enough for always-on wake-up circuits in body controllers or door modules where the flip-flop holds a latch state while the rest of the ECU sleeps. Clock frequency is 74 MHz, which is sufficient for most automotive serial-peripheral interfaces and sensor data pipelines running below 50 MHz. The propagation delay is 15 ns max at 6V with a 50 pF load — this sets the timing budget for the next stage: a 74 MHz clock period is 13.5 ns, so the delay eats into the hold margin at the receiver, especially at lower supply voltages where the delay increases. Operating temperature spans -40°C to 125°C ambient, the full automotive Grade 1 range. At 125°C junction, the input capacitance remains 5 pF, but the propagation delay and output rise times will be at the upper end of the datasheet limits — derate the clock frequency to around 60 MHz for reliable operation at the high end.