14-SOIC dual flip-flop with set/reset
The SN74HCS72DR packs two independent D-type flip-flops into a 14-SOIC package (3.90 mm width), each with Set (Preset) and Reset inputs and complementary outputs. Negative-edge triggered with a 74 MHz clock ceiling, it handles moderate-speed logic chains in control and data-path applications. Supply range spans 2 V to 6 V, making it compatible with both 3.3 V and 5 V logic rails without a level translator. The 2 µA quiescent current keeps standby draw negligible in battery-powered or always-on circuits.
Timing and drive at the board level
Maximum propagation delay is 15 ns at 6 V with a 50 pF load — the output settles within one 74 MHz clock period, so the timing budget for downstream logic starts at that figure. Output drive is 7.8 mA source and sink, enough to switch a standard CMOS gate input or a low-power LED indicator directly. Input capacitance is 5 pF per pin, a light load on the driving stage. The -40°C to 125°C operating range covers industrial and automotive under-hood environments — no derating needed for a hot enclosure or cold start.
Sourcing and lifecycle
It is sourced through authorized and independent distribution; lead time and pricing are confirmed at RFQ against the BOM quantity.