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Texas Instruments SN74HCS259DR — Discrete Semiconductors

SN74HCS259DR 8-Bit Addressable Latch, 2V-6V, 6ns

MPNSN74HCS259DR
End of Life

Texas Instruments 74HCS series, SN74HCS259DR, 8-bit addressable D-Type latch, 1:8 circuit, tri-state outputs, 2V-6V supply, 6ns propagation delay, -40°C to 125°C, 16-SOIC package.

$0.43Ref. price · indicative, final on quote
Packaging16-SOIC (0.154", 3.90mm Width)
StockContact for availability
MOQ1 pcs
  • 100% new & originalTraceable channels only — no refurbs, no pulls, no remarked parts.
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Specifications

SN74HCS259DR Technical Specifications
ParameterValue
Series74HCS
Logic typeD-Type, Addressable
Output typeTri-State
Mounting typeSurface Mount
Voltage2V ~ 6V
Current - output high, low7.8mA, 7.8mA
Operating temperature-40°C ~ 125°C
Circuit1:8
PackageTape & Reel (TR); Cut Tape (CT)
Case16-SOIC (0.154\", 3.90mm Width)
Independent circuits1
Delay time - propagation6ns

Product details

8-bit addressable latch with Schmitt-trigger inputs

The Texas Instruments SN74HCS259DR is an 8-bit addressable latch from the 74HCS logic family, combining a 1:8 demultiplexer and a storage latch in a single 16-SOIC package. It accepts a D-type input and routes it to one of eight outputs based on a three-bit address, with the remaining outputs held in their previous state. The tri-state outputs allow direct connection to shared data buses without external buffers. The -40°C to 125°C operating temperature range qualifies it for industrial and automotive under-hood environments — outdoor telecom cabinets, factory-floor I/O modules, and engine-adjacent ECUs. The 16-SOIC package (3.90 mm width) fits standard PCB layouts and is compatible with automated assembly.

6 ns propagation delay — timing margin on the bus

At 6 ns typical propagation delay, the SN74HCS259DR adds minimal latency to the address-to-data path. In a typical address-decoding application where the latch sits between the microcontroller address bus and a memory chip, the 6 ns delay leaves headroom for the memory's own access time and board-level trace delays. No need to derate bus speed for this part unless the system clock exceeds roughly 40 MHz.

Tri-state outputs and bus sharing

Tri-state outputs let the latch release the bus when not selected.

Active production — no LTB risk

ROHS3 compliant, lead-free, and suitable for new designs.

Frequently asked questions

Is SN74HCS259DR tri-state?

Yes, the outputs are tri-state, allowing the latch to release the bus when not selected.