Dual JK flip-flop with set/reset — what you're getting
Each flip-flop has independent set (preset) and reset inputs, so you can force the outputs high or low regardless of the clock state. Clock frequency hits 60 MHz — fast enough for counters, frequency dividers, and state machines in industrial logic. Supply range runs 2V to 6V, meaning it works off a 3.3V or 5V rail without a separate regulator.
60 MHz clock — timing margin for counters
Clock frequency is 60 MHz. Propagation delay is 13 ns into 50 pF at 6V.
Negative-edge trigger — which clock edge matters
This flip-flop clocks on the falling edge. Set and reset are asynchronous and active-low.
Quiescent draw and output drive
Quiescent current sits at 4 µA — negligible for battery-backed or always-on logic. Outputs source and sink 5.2 mA each, enough to drive a standard TTL load or an LED with a series resistor, but not enough for a relay coil directly. Input capacitance is 3 pF, so fan-out to other HC gates is generous.