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Texas Instruments SN74F08N — Analog & Data Acquisition

SN74F08N TI 74F Quad AND Gate, 14-DIP, 5.6ns @ 5V

MPNSN74F08N
End of Life

Texas Instruments 74F series, Quad 2-Input AND Gate, 14-DIP (0.300", 7.62mm), Through Hole, 4 Circuits, 5.6ns @ 5V/50pF, 4.5V~5.5V Supply, 0°C~70°C.

$0.69Ref. price · indicative, final on quote
Texas Instruments SN74F08N datasheet (PDF)
Packaging14-DIP (0.300", 7.62mm)
RoHSROHS3 Compliant
Series74F
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

SN74F08N specifications
ParameterValue
Series74F
Logic typeAND Gate
MountingThrough Hole
Supply voltage4.5V ~ 5.5V
Current - output high, low1mA, 20mA
I/O channels2
Operating temperature0°C ~ 70°C
PackageTube
Case14-DIP (0.300\", 7.62mm)
Number of circuits4
Input logic level - low0.8V
Input logic level - high2V
Max propagation delay @ v, max CL5.6ns @ 5V, 50pF

Product details

Package and board integration — 14-DIP through-hole

The SN74F08N: Not rated for extended industrial or automotive ambient.

Output drive and logic thresholds

Output sourcing current is 1 mA high, 20 mA low — the high-level drive is weak, so a 74F output driving a long trace or a high-impedance load needs a pull-up resistor or a buffer if the fan-out exceeds a few TTL loads. Input logic-low threshold is 0.8V, high threshold is 2V — standard TTL-compatible levels. A 3.3V driver's output-high at 2.4V still registers as a logic high, but the noise margin is only 0.4V; keep the trace short and the ground plane clean if mixing voltage domains.

Frequently asked questions

What is the propagation delay of the SN74F08N at 5V?

This is the spec that governs timing closure in a 5V synchronous bus — the gate's output settles within one 178 MHz clock period, but the actual system speed is lower once you account for input rise time and interconnect delay.