Dual 2-input AND gate in the 74AUP family — ultra-low-power glue logic
It operates from 0.8V to 3.6V supply, drawing a maximum quiescent current of only 500 nA, and delivers 4 mA output drive per channel. Propagation delay is 6.7 ns at 3.3V with a 30 pF load, fast enough for general-purpose logic gating in portable, IoT, and industrial control applications. The part is rated for -40°C to 85°C industrial temperature range and comes in an 8-VSSOP package (2.30 mm width) for space-constrained boards.
The wide supply range lets this gate work directly from a single Li-ion cell (2.7V–4.2V) or a 1.8V/3.3V regulated rail without a level shifter. The 0.8V floor is low enough for near-threshold logic in energy-harvesting designs. Input logic thresholds scale with supply: low-level is 0.7V–0.9V, high-level 1.6V–2V, so it is compatible with 1.8V and 3.3V CMOS families without extra translation.
500 nA quiescent — sizing the always-on budget
The 500 nA maximum quiescent current makes this gate suitable for power-management sequencing, wake-up logic, or interrupt routing that stays powered in sleep mode. In a system with a 100 µAh battery budget for the always-on domain, this gate consumes about 0.5% of that budget — negligible enough to leave on continuously.
ROHS3 compliant.
Supplied in 8-VSSOP (2.30 mm width, 0.091" body), surface-mount. The supplier device package is 8-VSSOP.