The Texas Instruments SN74AS534DWR is an 8-bit D-type flip-flop from the Advanced Schottky (AS) logic family. It captures data on the positive edge of the clock and presents the inverted state on tri-state outputs. The 125 MHz clock rate and 9 ns propagation delay (at 5V, 50 pF) suit it for high-speed bus interfaces, address latching, and register files in 5V systems.
SN74AS534DWR D-Type Flip-Flop, 125 MHz, Tri-State Inverted
MPNSN74AS534DWR
End of Life
Texas Instruments SN74AS534DWR, AS series bus driver, 8-bit D-type flip-flop, positive-edge triggered, tri-state inverted outputs, 125 MHz clock frequency, 4.5V–5.5V supply, 20-SOIC package, 0°C to 70°C operating temperature.
$1.73Ref. price · indicative, final on quote
Packaging20-SOIC (0.295", 7.50mm Width)
RoHSRoHS non-compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026
Specifications
| Parameter | Value |
|---|---|
| Type | D-Type |
| Output type | Tri-State, Inverted |
| Trigger type | Positive Edge |
| Mounting | Surface Mount |
| Supply voltage | 4.5V ~ 5.5V |
| Current - quiescent | 128 mA |
| Current - output high, low | 15mA, 48mA |
| Clock frequency | 125 MHz |
| Operating temperature | 0°C ~ 70°C (TA) |
| Package | Bulk |
| Function | Standard |
| Case | 20-SOIC (0.295\", 7.50mm Width) |
| Number of elements | 1 |
| Number of bits per element | 8 |
| Max propagation delay @ v, max CL | 9ns @ 5V, 50pF |
Product details
Frequently asked questions
What is the difference between SN74AS534 and SN74AS574?
The SN74AS534 provides inverted outputs, while the SN74AS574 provides non-inverted outputs. Both are 8-bit D-type flip-flops with tri-state outputs and share the same pinout and package options.
What is the closest functional second-source for SN74AS534DWR?
A close functional peer is the 74F374SCX-NS from the Fairchild 74F series. It offers similar speed (140 MHz clock, 8.5 ns propagation delay at 5V, 50 pF) but with non-inverted outputs. The 74F374 is also a positive-edge triggered 8-bit D-type in a surface-mount package, though pin compatibility should be verified against the specific footprint.