48 mA drive, 4 ns — the bipolar speed edge
The SN74AS1004ADR: Propagation delay is 4 ns maximum at 5 V with a 50 pF load, placing this part in the fast bipolar tier for address decoding, clock distribution, or signal conditioning where the 10 ns of a 74LS04 or 74HC04 would eat into timing margin.
Package and temp grade — commercial SOIC
Housed in a 14-SOIC wide-body package (0.154-inch width, 3.90 mm body width), the SN74AS1004ADR uses the standard SOIC-14 footprint that reflows easily and is compatible with automated optical inspection. Input logic thresholds are TTL-compatible: low at 0.8 V max, high at 2 V min, so it interfaces directly with 5 V TTL and 5 V CMOS logic families without level translation.