8-bit synchronous up/down counter for 5 V logic systems
The SN74ALS867ADW is an 8-bit synchronous binary up/down counter from the 74ALS family, clocked on the positive edge with an asynchronous reset. It counts at up to 35 MHz.
35 MHz count rate — timing margin in a 5 V bus
The 35 MHz maximum count rate sets the upper bound on the input clock frequency the counter can reliably track. The synchronous timing means all bit transitions happen on the same clock edge.
Asynchronous reset — instant clear without waiting for a clock
The asynchronous reset overrides the clock and forces all eight outputs low regardless of the current count state. This is useful for power-on initialization or emergency stop conditions where the counter must zero out immediately, not on the next clock edge. The positive-edge trigger simplifies interfacing with standard 5 V logic families — the count increments on the rising edge, so setup and hold times are referenced to that edge only.
Commercial temperature range — indoor, controlled environments
There is no LTB notice or obsolescence risk on this line.