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Texas Instruments SN74ACT534PW — Analog & Data Acquisition

SN74ACT534PW D-Type Flip-Flop, 8-Bit, 100 MHz, 20-TSSOP

MPNSN74ACT534PW
End of Life

Texas Instruments 74ACT series D-Type flip-flop, SN74ACT534PW, 8-bit, tri-state inverted outputs, positive edge triggered, 100 MHz clock, 4.5-5.5V supply, 20-TSSOP.

$1.26Ref. price · indicative, final on quote
Packaging20-TSSOP (0.173", 4.40mm Width)
RoHSROHS3 Compliant
Series74ACT
Sourced new & surplus through independent channelsAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

SN74ACT534PW specifications
ParameterValue
TypeD-Type
Series74ACT
Output typeTri-State, Inverted
Trigger typePositive Edge
MountingSurface Mount
Voltage4.5V ~ 5.5V
Current - quiescent4 µA
Current - output high, low24mA, 24mA
Frequency100 MHz
Operating temperature-40°C ~ 85°C (TA)
PackageTube
FunctionStandard
Case20-TSSOP (0.173\", 4.40mm Width)
Input capacitance4.5 pF
Number of elements1
Number of bits per element8
Max propagation delay @ v, max CL11.5ns @ 5V, 50pF

Product details

Active lifecycle — no BOM risk for new builds

The SN74ACT534PW: ROHS3 compliant, so it clears EU and global regulatory gates without exemption paperwork.

8-bit D-Type with tri-state inverted bus drive

A single-element 8-bit positive-edge-triggered D-Type flip-flop. The outputs are tri-state and inverted — meaning when the output-enable is asserted, the bus sees the complement of the stored data; when de-asserted, the outputs go high-impedance and the bus floats. This is useful for shared data buses where multiple devices drive the same lines and you need bus isolation without external buffer gates. Runs on a 4.5V to 5.5V supply — this is a 5V logic family, not 3.3V. If your system rail is 3.3V, this part needs a level translator or a separate 5V supply. Clock frequency is 100 MHz, with a max propagation delay of 11.5 ns at 5V into a 50 pF load. That delay sets the timing budget for the data-to-output path — at 100 MHz the clock period is 10 ns, so the 11.5 ns delay means the output arrives after the next clock edge unless you pipeline or use a slower clock. For most 8-bit register applications below 50 MHz, the margin is comfortable.

Industrial temperature range and 24 mA drive

This covers factory-floor PLC cabinets, outdoor telecom shelters, and engine-bay-adjacent enclosures where the ambient stays below 85°C. Output drive is 24 mA source and sink — enough to drive a bus line, an LED indicator, or a downstream gate input without a separate buffer. The tri-state control lets you share the bus with other devices without contention. Input capacitance is 4.5 pF per input — light enough that the upstream driver sees a small load, which helps maintain signal integrity on a backplane or long PCB trace at 100 MHz. Quiescent current is 4 µA — negligible in a system that already draws milliamps for the rest of the logic. Not a low-power part by design, but the standby draw won't trouble a 5V rail.

20-TSSOP — fine-pitch surface-mount footprint

The supplier device package is 20-TSSOP — same mechanical outline. This is a fine-pitch SMD; the 0.65 mm pitch requires a PCB with soldermask-defined pads and a stencil aperture that matches the land pattern. Surface-mount only — no through-hole variant exists for this order code. The tube packaging means it ships in anti-static tubes, not tape-and-reel, so pick-and-place lines need tube feeders or a transfer to tape.