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Texas Instruments SN65LVDS96DGG — Interface & Transceivers

SN65LVDS96DGG LVDS Deserializer, 1.428 Gbps, 48-TSSOP

MPNSN65LVDS96DGG
Active

Texas Instruments SN65LVDS96DGG, LVDS Deserializer, 1.428 Gbps data rate, 3 LVDS inputs to 21 LVTTL outputs, 3 V to 3.6 V supply, 48-TFSOP (48-TSSOP), -40°C to 85°C operating temperature.

$8.2000Ref. price · indicative, final on quote
Texas Instruments SN65LVDS96DGG datasheet (PDF)
Packaging48-TFSOP (0.240", 6.10mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

SN65LVDS96DGG specifications
ParameterValue
Input typeLVDS
Output typeLVTTL
MountingSurface Mount
Supply voltage3V ~ 3.6V
I/O channels21
Operating temperature-40°C~85°C(TA)
PackageTube
FunctionDeserializer
Data rate1.428Gbps
Case48-TFSOP (0.240\", 6.10mm Width)

Product details

LVDS deserializer for high-speed serial links

The Texas Instruments SN65LVDS96DGG is an LVDS deserializer that converts three serial LVDS data streams into 21 parallel LVTTL outputs, supporting an aggregate data rate of 1.428 Gbps. This part is commonly used in flat-panel display interfaces, camera links, and other high-speed point-to-point data links where LVDS signaling reduces EMI and allows longer cable runs.

The 48-TFSOP (0.240", 6.10 mm width) package is a fine-pitch surface-mount footprint. The supplier device package is 48-TSSOP, which is the same mechanical outline.

It is ROHS3 compliant, which satisfies the European Union's Restriction of Hazardous Substances directive for lead-free assembly.

Frequently asked questions

Is SN65LVDS96DGG pin compatible with SN65LVDS96DGGR?

Yes, the SN65LVDS96DGGR is the tape-and-reel packaged variant of the same die and shares the identical pinout and electrical specifications with the SN65LVDS96DGG.

Does SN65LVDS96DGG require external resistors or termination?

The SN65LVDS96DGG integrates LVDS termination resistors on the inputs, so external termination resistors are not required for the serial data lines. The LVTTL outputs are standard push-pull and do not need pull-up or pull-down resistors for logic levels.