The SN65LVDS9637DGNRG4: The 150 Mbps data rate is the per-channel maximum. At 3.3V nominal supply, the receiver maintains input threshold hysteresis that rejects common-mode noise on the LVDS pair. If your system runs at 100 Mbps or lower (e.g., camera serial links, display interfaces), the part has margin. For a link pushing 150 Mbps, keep the differential trace length under a few meters and match the 100-Ω termination resistor close to the receiver input pins — the 8-HVSSOP package keeps the signal path short.
TI lists the SN65LVDS9637DGNRG4 as Active. The base product number 65LVDS9637 covers the full family, so if you need a different package variant (e.g., SOIC), the same electrical core applies.
The receiver operates from 3V to 3.6V supply. The exposed pad (8-HVSSOP) helps pull heat away when the board is convection-cooled.
