Dual LVDS receiver in a small footprint
It packs two receivers into an 8-VSSOP package, saving board area on multi-lane serial links. Supply runs from 3V to 3.6V — a tight 3.3V nominal rail — so check your power tree for compatibility with 5V-only logic families downstream.
150 Mbps data rate — what it buys you
At 150 Mbps, each receiver can serialize a 15 MHz pixel clock with 10-bit color depth, or handle a 100BASE-TX MII interface without breaking a sweat. The LVDS signaling keeps common-mode noise rejection high — useful when the cable runs a few meters inside a machine cabinet. If your link needs more headroom, the 150 Mbps ceiling is the per-channel limit; for faster links like 720p video at 60 Hz you'd step up to a 400+ Mbps part.
Industrial temperature range and environment
It is not automotive-qualified (no AEC-Q100 marking), so keep it out of under-hood or chassis-domain designs. The 8-VSSOP package (3.0 mm × 3.0 mm body) is small enough for space-constrained PCBs but needs careful solder-paste stencil design to avoid bridging on the fine-pitch leads.
For dual-sourcing resilience, the SN65LVDS9637D in the larger SOIC-8 package is a functional equivalent — same die, same 150 Mbps rating, just a different footprint. The DGK variant's VSSOP package is the space-saver choice.