Active production, industrial temp, 48-TSSOP
The Texas Instruments SN65LVDS95DGGG4 is a 21-input, 3-output LVDS serializer in the 48-TFSOP (TSSOP) package. It aggregates 21 parallel LVDS data channels into three serial LVTTL outputs at a combined data rate of 1.428 Gbps. Supply voltage is 3V to 3.6V, matching common 3.3V logic rails.
1.428 Gbps aggregate — sizing the serial link
The 1.428 Gbps aggregate data rate is the key parametric for link budgeting. With 21 inputs and 3 outputs, each output lane runs at approximately 476 Mbps. This supports 24-bit color at WXGA (1366x768) or similar resolutions over a single twisted-pair or differential-pair cable per output. If your target display or sensor interface needs higher pixel clocks, budget the serial line rate against the cable length and signal integrity — the LVDS output swing is standard 350 mV typical.