The Texas Instruments SN65LVDS93DGGR is a serializer IC that takes 28 parallel LVTTL inputs and serialises them onto 4 LVDS output pairs. It is designed for high-speed video and data transmission over twisted-pair or PCB traces, commonly used in flat-panel displays, camera modules, and industrial video links where the cable or backplane must carry a wide parallel bus over a narrow differential pair count.
The 1.904 Gbps aggregate data rate is the sum across all four LVDS output pairs. With 28 inputs, each output pair carries seven serialised bits, so the per-pair line rate is roughly 476 Mbps. That is fast enough for WXGA (1366×768) video at 60 Hz with 24-bit colour, or lower-resolution panels with higher colour depth. The serializer itself does not embed a clock — a separate LVDS clock pair is required from the source, and the receiver must recover that clock. For cable runs, expect clean signal integrity up to several metres with proper impedance-controlled cabling; beyond that, a repeater or cable equaliser may be needed.
28 inputs, 4 outputs — bus-width planning
The 28 LVTTL inputs map to 4 LVDS outputs at a 7:1 serialisation ratio. That means the parallel bus width is fixed at 28 bits — you cannot use fewer inputs and get a different ratio. If your video source outputs 24-bit RGB plus syncs, that is 27 bits; the 28th input can carry a data enable or be grounded. The LVTTL inputs are 3.3 V tolerant, so no level shifting is needed when the source is a 3.3 V FPGA, GPU, or MCU parallel port.
Package and reflow — 56-TSSOP on the line
The SN65LVDS93DGGR comes in a 56-lead TSSOP (0.65 mm pitch, 6.10 mm body width). This is a standard fine-pitch package that pick-and-place handles well, but the 0.65 mm pitch means the solder-paste stencil aperture needs a clean release — no tombstoning risk if the land pattern follows the IPC-7351 standard.