28-to-4 LVDS serializer for video and data links
The Texas Instruments SN65LVDS93ADGG is a 28-input, 4-output LVDS serializer that converts 28 parallel LVTTL data lines into four serial LVDS data streams, plus a dedicated LVDS clock channel. It handles an aggregate data rate of 3.78 Gbps, making it suitable for 24-bit color video at resolutions up to WUXGA (1920×1200) at 60 Hz with the required blanking overhead.
3.78 Gbps aggregate — headroom for high-res video
The 3.78 Gbps aggregate data rate is the sum of the four LVDS output lanes plus the clock. With each lane running at up to 945 Mbps, the link can carry 28 bits of parallel data plus a forwarded clock. For a 24-bit RGB video stream at 1080p60 (148.5 MHz pixel clock), the serial rate per lane is about 742.5 Mbps, leaving margin for the clock channel and cable losses. The LVTTL inputs accept 3.3V logic levels directly, so no level translation is needed when the source is a standard FPGA or SoC GPIO bank.
Industrial temperature and TSSOP package
The 56-TFSOP (0.240", 6.10mm width) package is a fine-pitch TSSOP (supplier device package 56-TSSOP) that requires standard SMT reflow with a 0.5 mm pitch.
The base product number 65LVDS93 covers the family; the DGG suffix denotes the TSSOP package and Tube delivery.