16-channel LVDS driver at 630 Mbps — what the data rate buys you
The Texas Instruments SN65LVDS387DGGRG4 is a 16-channel LVDS driver in the 65LVDS family, designed to push parallel data or clock signals across differential pairs at rates up to 630 Mbps per channel. With sixteen drivers and zero receivers on-chip, this is a pure transmit-side buffer — you pair it with a separate LVDS receiver array on the far end of the cable or backplane. The 630 Mbps rating means each channel can serialize a 10-bit parallel word at 63 MHz or a 16-bit word at 39.375 MHz, giving you the headroom for high-resolution video links, high-speed data acquisition backplanes, or clock distribution trees where jitter budget is tight.
Supply and temperature — where this driver lives
No external voltage translation needed if your FPGA or ASIC already swings 3.3V CMOS into the driver inputs. If your application stays inside a climate-controlled rack, the commercial end of that range is fine; if the board sits near a hot motor drive or an unvented enclosure, the -40°C low end and 85°C high end give you the margin without stepping up to a mil-spec part.
Package and footprint — 64-TSSOP
Housed in a 64-TSSOP package (0.240" body width, 6.10 mm), the part is a surface-mount device intended for automated assembly. The 0.5 mm pitch fine-pitch TSSOP footprint is common on multilayer boards; route the 16 differential output pairs with controlled impedance (typically 100 Ω differential) and keep the trace length matched within a few mm to preserve signal integrity at 630 Mbps. The package is rated for standard reflow profiles — no exotic handling beyond MSL precautions.
TI lists the SN65LVDS387DGGRG4 as Active. No need to qualify a replacement or stockpile for an imminent phase-out.