Four-channel LVDS receiver for high-speed backplane and cable interfaces
The Texas Instruments SN65LVDS352PWRG4 is a 4-channel LVDS receiver from the 65LVDS series, designed for point-to-point and multidrop data transmission over controlled-impedance media. It accepts LVDS signals at a data rate of 560Mbps per channel and provides a 50 mV hysteresis receiver input for noise rejection on long traces or cable runs.
This means TI has discontinued production and no further factory orders can be placed. For existing BOM lines that specify this exact receiver, the only supply path is through independent distribution — qualified, traceable inventory from surplus, overstock, or last-time-buy stockpiles. There is no official TI successor listed for this specific order code, so a design requiring the 24-TSSOP footprint and 560Mbps rate should validate any substitute against the original layout and timing budget.
The 560Mbps data rate per receiver channel, combined with the 50 mV hysteresis, gives this part a defined noise margin on differential lines. In practice, that rate supports common LVDS serial links such as 7:1 deserialization for 720p video, or 8B/10B encoded data streams up to 280 Mbaud. The four receivers share a common supply and ground, so the total aggregate throughput across the part is 2.24 Gbps. The industrial temperature range means the receiver holds its timing and threshold specs across the floor of a warm factory cabinet or a passively cooled outdoor enclosure.
24-TSSOP — fits existing backplane layouts
The supply range of 3V to 3.6V is typical for 3.3V LVDS buses; ensure the local rail is within this window, especially if the part shares a rail with 2.5V logic downstream. No exposed thermal pad — junction temperature is managed through the leadframe and PCB copper.