SN65LVDS34D

Texas Instruments

Texas Instruments 65LVDS series LVDS receiver, 2 receivers, 0 drivers, 400 Mbps data rate, 50 mV hysteresis, 3V to 3.6V supply, -40°C to 85°C, 8-SOIC package.

SN65LVDS34D
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Technical specifications

SN65LVDS34D specifications
Parameter / AttributeSpecification / Value
TypeReceiver
Series65LVDS
MountingSurface Mount
Supply voltage3V ~ 3.6V
ProtocolLVDS
Operating temperature-40°C~85°C
PackageTube
Data rate400Mbps
Case8-SOIC (0.154\", 3.90mm Width)
Receiver hysteresis50 mV
Number of drivers (Receivers)0/2

Technical details

Dual LVDS receiver — 400 Mbps, 50 mV hysteresis

SN65LVDS34D integrates two independent receiver channels with no drivers — a pure receive-side device, not a transceiver.

400 Mbps data rate — backplane and cable reach

The 400 Mbps per-channel data rate supports common LVDS signaling for parallel bus receivers, clock distribution, and serialized data links over twisted-pair or differential PCB traces. At this speed, signal integrity depends on proper termination — the 50 mV hysteresis helps reject coupled noise on longer traces where ground offset or crosstalk would otherwise cause bit errors. With two independent receivers in one package, the SN65LVDS34D can handle a differential clock-plus-data pair or two separate data channels, saving board area versus two single-channel receivers. The 0/2 driver/receiver count means it is strictly an LVDS receive function — pair it with a separate LVDS driver or transceiver on the transmit side.

SN65LVDS34D
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