Rated at 400 Mbps per channel, this receiver can handle 200 MHz clock or 400 Mbps serial data with enough margin for most LVDS links up to a few metres of twisted-pair or differential PCB trace. The 50 mV of built-in hysteresis on each receiver input provides noise rejection on the differential pair — useful when the cable picks up common-mode interference from nearby motor drives or switching supplies. If your target link runs at 100 Mbps or below, you have generous timing margin; at 400 Mbps you still have the full spec headroom, but pay attention to the input common-mode range and termination scheme in the layout.
SN65LVDS3486DR
Texas Instruments
Texas Instruments 65LVDS series LVDS receiver, SN65LVDS3486DR, 400 Mbps data rate, 50 mV hysteresis, 3V to 3.6V supply, 16-SOIC package, industrial temperature range -40°C to 85°C.
[IN STOCK] In Stock: 43 pcs
MOQ 1 · Tape & Reel (TR) · RoHS · EIA-481 · DAP/DDP · T/T
Technical specifications
| Parameter / Attribute | Specification / Value |
|---|---|
| Type | Receiver |
| Series | 65LVDS |
| Mounting | Surface Mount |
| Supply voltage | 3V ~ 3.6V |
| Protocol | LVDS |
| Operating temperature | -40°C~85°C |
| Package | Tape & Reel (TR) |
| Data rate | 400Mbps |
| Case | 16-SOIC (0.154\", 3.90mm Width) |
| Receiver hysteresis | 50 mV |
| Number of drivers (Receivers) | 0/4 |
Technical details
SN65LVDS3486DR
[ALLOC] verified