Texas Instruments 65LVDS series SN65LVDS33PWG4 LVDS Receiver, 0/4 Drivers/Receivers, 400Mbps Data Rate, 3V~3.6V Supply, 16-TSSOP Package, -40°C~85°C Operating Temperature.
| Parameter | Value |
|---|---|
| Type | Receiver |
| Series | 65LVDS |
| Mounting | Surface Mount |
| Supply voltage | 3V ~ 3.6V |
| Protocol | LVDS |
| Operating temperature | -40°C~85°C |
| Package | Bulk |
| Data rate | 400Mbps |
| Case | 16-TSSOP (0.173\", 4.40mm Width) |
| Receiver hysteresis | 50 mV |
| Number of drivers (Receivers) | 0/4 |
The 400 Mbps data rate is the per-channel switching limit; at that speed the receiver's differential input threshold and 50 mV hysteresis define the noise margin. If your cable run exceeds a few meters or passes near a VFD, the hysteresis helps prevent the output from chattering on common-mode noise coupled onto the LVDS pair.
The supplier device package is 16-TSSOP, matching the package / case field.
Within the 65LVDS family, pin-compatible quad LVDS receivers share the same footprint and supply range. The specific alternate depends on your required data rate and hysteresis — check the family datasheet for the matrix.