It converts four differential LVDS signal pairs into single-ended CMOS outputs at a data rate up to 400 Mbps per channel. The 50 mV of built-in receiver hysteresis cleans up noisy lines from long cables or backplane traces — a common pain point when the link runs across a chassis or through a harness.
SN65LVDS33D LVDS Receiver, 400 Mbps, 16-SOIC
MPNSN65LVDS33D
Active
Texas Instruments 65LVDS series, SN65LVDS33D, LVDS Receiver, 0/4 drivers/receivers, 400 Mbps data rate, 50 mV hysteresis, 3 V to 3.6 V supply, -40°C to 85°C, 16-SOIC.
$3.2300Ref. price · indicative, final on quote
Packaging16-SOIC (0.154", 3.90mm Width)
RoHSROHS3 Compliant
Series65LVDS
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026
Specifications
| Parameter | Value |
|---|---|
| Type | Receiver |
| Series | 65LVDS |
| Mounting | Surface Mount |
| Supply voltage | 3V ~ 3.6V |
| Protocol | LVDS |
| Operating temperature | -40°C~85°C |
| Package | Tube |
| Data rate | 400Mbps |
| Case | 16-SOIC (0.154\", 3.90mm Width) |
| Receiver hysteresis | 50 mV |
| Number of drivers (Receivers) | 0/4 |
Product details
Frequently asked questions
What is the data rate of SN65LVDS33D?
The SN65LVDS33D supports a data rate of 400 Mbps per channel.
Can SN65LVDS33D be used at 3.3V only?
Yes. It also holds operation through a 3.0 V drop without losing the link.
SN65LVDS33D vs SN65LVDS34D difference?
Both are quad LVDS receivers in the same family. The SN65LVDS34D adds a flow-through pinout that simplifies PCB layout for some designs, while the SN65LVDS33D uses a standard pin arrangement. Functionally they are the same receiver core; the choice is a board-routing decision.