It converts four differential LVDS signal pairs into single-ended CMOS outputs at a data rate up to 400 Mbps per channel. The 50 mV of built-in receiver hysteresis cleans up noisy lines from long cables or backplane traces — a common pain point when the link runs across a chassis or through a harness.
SN65LVDS33D
Texas Instruments · 65LVDS Series
Texas Instruments 65LVDS series, SN65LVDS33D, LVDS Receiver, 0/4 drivers/receivers, 400 Mbps data rate, 50 mV hysteresis, 3 V to 3.6 V supply, -40°C to 85°C, 16-SOIC.
[IN STOCK] In Stock: 30 pcs
MOQ 1 · Tube · RoHS · EIA-481 · DAP/DDP · T/T
Technical specifications
| Parameter / Attribute | Specification / Value |
|---|---|
| Type | Receiver |
| Series | 65LVDS |
| Mounting | Surface Mount |
| Supply voltage | 3V ~ 3.6V |
| Protocol | LVDS |
| Operating temperature | -40°C~85°C |
| Package | Tube |
| Data rate | 400Mbps |
| Case | 16-SOIC (0.154\", 3.90mm Width) |
| Receiver hysteresis | 50 mV |
| Number of drivers (Receivers) | 0/4 |
Technical details
SN65LVDS33D
[ALLOC] verified