PECL-to-LVDS buffer for high-speed serial links
It supports a maximum data rate of 2 Gbps with a propagation delay of 460 ps, making it suitable for retiming or extending the reach of serial links in telecom, networking, and data-acquisition systems.
The SN65LVDS18DRFR is officially marked as Obsolete by Texas Instruments. This means TI no longer manufactures or supports the part, and no last-time-buy window remains open. For production or repair BOMs that require this exact order code, procurement must turn to the independent distribution market. There is no official TI successor listed for this device; any replacement would need to match the PECL-input, LVDS-output, 2 Gbps, single-channel function in a similar footprint.
460 ps delay and 2 Gbps — what they mean for signal integrity
The 460 ps propagation delay is the time the reDriver adds from input crossing to output transition. In a multi-drop backplane or a long cable run, this delay stacks with trace and connector latency; budget it into the timing closure for the receiving device's setup-and-hold window. The 2 Gbps data rate is the maximum serial bit rate the part can cleanly retransmit — above that, the output eye degrades. At 2 Gbps, the part acts as a signal conditioner, re-shaping edges that have been rounded by PCB loss or connector impedance mismatch. The single-channel configuration means one differential pair per package; for multi-lane links (e.g., 4-lane PCIe or quad SerDes), you need four devices or a multi-channel alternative.