Full-duplex LVDS transceiver for automotive and industrial serial links
The 400 Mbps data rate is the raw serial bit rate the LVDS driver and receiver can sustain. For a typical 100-ohm differential pair on a PCB, that translates to roughly 200 MHz fundamental frequency. The full-duplex architecture means simultaneous transmit and receive on separate pairs, so no bus-turnaround dead cycles — useful for real-time control loops or video streaming where latency matters.
Package and supply voltage
Housed in a 14-TSSOP (4.40 mm width), the footprint is standard for low-profile surface-mount assembly. Supply range of 3V to 3.6V aligns with common 3.3V logic rails; no external level shifters needed when interfacing with 3.3V FPGAs, MCUs, or ASICs. The single driver/receiver pair (1/1) suits simple link isolation or signal repeating.