The 150 Mbps data rate is the raw bit clock the transceiver can sustain across a differential pair. At this speed, the LVDS signaling keeps the edge rate controlled enough that a 14-TSSOP layout with short stubs and a solid ground plane underneath the pair will close the eye without external termination tweaks. If your link runs at 100 Mbps or lower, you have margin; if you are pushing toward 200 Mbps, you need a faster transceiver.
Full duplex and 1/1 driver/receiver count
Full duplex means the driver and receiver operate simultaneously over separate differential pairs — no direction control needed. With one driver and one receiver, this transceiver is sized for a single bidirectional link where both ends transmit at the same time, typical in clock-forwarding or dedicated data/clock channels. If your application needs half-duplex or more channels, this is not the right part.
Supply and temperature range — the design-in boundaries
It is not 5 V tolerant on the supply or the I/O — a common gotcha when backporting into a legacy 5 V backplane.