1:4 LVDS fan-out at 400 Mbps — what it does on your board
It is built for clock or data fan-out in high-speed serial links where signal integrity matters — think backplane repeaters, cable extenders, or distributing a reference clock across multiple ADC/DAC channels. The 400 Mbps per-channel data rate and 3.1 ns propagation delay keep skew tight across the four outputs, so you can drive multiple loads without reclocking.
That 300 mV headroom on either side gives you margin against ripple on a shared backplane or through a long cable drop. The 23 mA supply current is the total draw from that rail — no per-output current to budget separately.
Industrial temperature range and 16-TSSOP package
The 3 pF input capacitance is low enough to not load the upstream driver noticeably.
For dual-sourcing, TI's LVDS buffer family includes pin-compatible 1:4 fan-out parts with the same footprint — check the 65LVDS104 base number for sibling variants if you need a second source for high-volume lines.