1:4 LVDS fanout at 400 Mbps — the signal-integrity workhorse
The Texas Instruments SN65LVDS104DG4 is a 1:4 LVDS buffer and multiplexer designed to fan out one differential LVDS input to four LVDS outputs with minimal skew. The 3 pF input capacitance and differential signaling make it a clean choice for clock distribution, backplane repeaters, and high-speed serial links where signal integrity matters more than raw speed.
400 Mbps and 3.1 ns — timing closure without margin games
At 400Mbps the SN65LVDS104DG4 handles 200 MHz clock rates comfortably. The 3.1ns delay matters when you are budgeting propagation through a fanout tree: four outputs from one input means the same signal arrives at multiple receivers within that window.
Package and temperature grade — industrial reliability in a small footprint
Housed in a 16-SOIC (0.154", 3.90mm Width) surface-mount package, the SN65LVDS104DG4 fits standard PCB layouts. The 3 pF input capacitance keeps the load light on the driving source, which helps maintain signal edges at 400Mbps over short backplane traces.
For production BOMs this means no forced redesign cycle — the part is still in current manufacturing.