LVDS fanout for backplane and cable interfaces
The SN65LVDS104D is a 1:4 LVDS buffer and multiplexer — it takes one differential LVDS input and fans it out to four LVDS outputs, or routes one of two inputs to all four outputs in mux mode. Rated for 400 Mbps per channel, with a 3.1 ns propagation delay, it keeps skew low enough that a 100 MHz clock tree stays within a few hundred picoseconds of the source — no re-synchronisation needed at the far end.
Supply and temperature — industrial BOM fit
The 3 pF input capacitance keeps the load on the driving source light — a standard LVDS driver can feed four SN65LVDS104D inputs in parallel without ringing.
Package and board-fit
Housed in a 16-pin narrow-body SOIC (3.90 mm width, 0.154" pitch) — the same footprint as a standard SOIC-16 op-amp or logic gate. Surface-mount, no thermal pad, no special soldering profile beyond the standard 260°C peak reflow. The tube packaging means it arrives in anti-static tubes, not tape-and-reel; for pick-and-place, transfer to a feeder tray or order the tape-and-reel variant if your line is set up for it.