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Texas Instruments SN65LVDS047PWG4 — Interface & Transceivers

SN65LVDS047PWG4 LVDS Driver, 400 Mbps, 16-TSSOP

MPNSN65LVDS047PWG4
End of Life

Texas Instruments 65LVDS series, SN65LVDS047PWG4, LVDS Driver, 400Mbps data rate, 4 drivers, 0 receivers, 3V~3.6V supply, -40°C~85°C, 16-TSSOP package, Surface Mount.

$4.2400Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

SN65LVDS047PWG4 specifications
ParameterValue
TypeDriver
Series65LVDS
MountingSurface Mount
Supply voltage3V ~ 3.6V
ProtocolLVDS
Operating temperature-40°C~85°C
PackageTube
Data rate400Mbps
Case16-TSSOP (0.173\", 4.40mm Width)
Number of drivers (Receivers)4/0

Product details

Four-channel LVDS line driver for high-speed serial backplanes

It packs four drivers and zero receivers — this is a unidirectional transmit-only part, not a transceiver, so the BOM needs a separate receiver on the other end of each link. Supply range runs 3V to 3.6V, which drops straight into a 3.3V rail without a regulator. Housed in a 16-TSSOP package with 0.173" body width and 4.40 mm profile, it sits on a standard surface-mount footprint. The 16-pin count keeps the board area tight — four differential pairs plus power and ground in a single row.

400 Mbps per channel — what it buys on the bus

At 400 Mbps each channel can serialize a 100 MHz parallel bus into one differential pair, or run a raw video link at 24-bit colour depth. The LVDS swing (typically 350 mV differential) means the signal integrity budget goes further than single-ended CMOS at the same rate — you can push a couple metres over twisted-pair or ribbon cable before the eye closes. Four drivers in one package means four independent serial links off one IC, or you can gang them as a quad-wide parallel bus with a shared clock. The driver-only topology keeps the output impedance controlled; there is no receive termination to balance, which simplifies the PCB layout compared to a bidirectional transceiver.

3.3 V rail fit and temperature coverage

This matters for backplane designs where the 3.3 V plane already feeds the logic core and I/O banks.

TI lists the SN65LVDS047PWG4 as Active on the product status.

Frequently asked questions

Is SN65LVDS047PWG4 compatible with 3.3V logic?

Yes. The LVDS output swing is standard 350 mV differential, and the input thresholds are LVTTL/LVCMOS compatible at 3.3V.