Quad LVDS driver for 400 Mbps point-to-point links
It handles differential signalling at up to 400 Mbps per channel, translating single-ended CMOS/TTL inputs into low-swing LVDS outputs for driving twisted-pair or PCB traces over short-to-medium distances. Typical deployment: backplane clock/data distribution, camera link interfaces, and any high-speed serial link where low noise and low power matter.
Each of the four drivers switches at 400 Mbps, which is a 200 MHz fundamental. At that edge rate, the PCB trace length and impedance matching start to matter — keep stub lengths under 0.5 inch and use controlled-impedance traces (100 Ω differential). The LVDS output swing is typically 350 mV into a 100 Ω termination, so the receiver end needs a proper differential termination resistor close to the input pins. The part does not include internal fail-safe biasing; the designer should add external biasing if the bus can float.