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SN65HVD07DR

TI SN65HVD07DR RS485 Transceiver, 1Mbps, 5V, SOIC-8

MPNSN65HVD07DR
Active

Texas Instruments SN65HVD07DR half-duplex RS422/RS485 transceiver, 1 Mbps data rate, 4.5V to 5.5V supply, 35 mV receiver hysteresis, -40°C to 85°C, 8-SOIC package.

$4.0600Ref. price · indicative, final on quote
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

SN65HVD07DR specifications
ParameterValue
TypeTransceiver
MountingSurface Mount
Supply voltage4.5V ~ 5.5V
ProtocolRS422, RS485
Operating temperature-40°C~85°C
DuplexHalf
PackageTape & Reel (TR); Cut Tape (CT)
Data rate1Mbps
Case8-SOIC (0.154\", 3.90mm Width)
Receiver hysteresis35 mV
Number of drivers (Receivers)1/1

Product details

SN65HVD07DR — 5V RS485 transceiver for industrial serial links

The 35 mV of receiver hysteresis provides a clean noise margin on long cable runs typical in factory automation, building management, and PLC-to-sensor links.

1 Mbps data rate — enough for most sensor and actuator busses

At 1 Mbps this transceiver covers Modbus RTU, Profibus DP at lower baud rates, and most proprietary RS-485 fieldbus protocols. It will not support the 10 Mbps+ needed for some vision-system or high-speed encoder links, but for temperature controllers, VFDs, and remote I/O racks the margin is fine. The half-duplex architecture means the driver and receiver share the bus pair; firmware must manage the direction pin (DE/RE) to avoid contention.

Industrial temperature, 5V-only supply

The 4.5V minimum supply means a 5V rail with 10% tolerance still keeps the part in spec, but 3.3V logic systems need a level translator on the digital side — the transceiver itself does not accept 3.3V on the supply or bus pins.

TI lists the SN65HVD07DR as Active.

Frequently asked questions

Is SN65HVD07DR compatible with 5V systems?

Yes. The supply range is 4.5V to 5.5V, so it operates directly on a 5V rail. The logic-level inputs (DI, DE, RE) are 5V-tolerant. For 3.3V microcontrollers, a level shifter is required on the digital interface pins.