Clock-tree fanout from one TTL input to six CMOS outputs
The Texas Instruments PLL1700E is a single-circuit PLL Multi-Clock Generator that accepts one TTL-level input and delivers six CMOS-level clock outputs, all synchronised to the internal phase-locked loop. The maximum output frequency is 36.87 MHz, which sets the upper bound for the clock domains it can drive — audio codec master clocks, video pixel clocks, or serial-interface bit clocks fall within this range.
NRND — plan a replacement for new builds
This means Texas Instruments will continue to supply existing orders for a period, but the part is not intended for new product introductions. For a production BOM that already qualifies this device, the existing stock and independent-distribution channel can sustain repairs and short-run builds. For a new design, a pin-compatible or functionally equivalent clock generator should be selected during the component review gate.
20-SSOP footprint and surface-mount assembly
Housed in a 20-SSOP package (0.209-inch body width, 5.30 mm), the PLL1700E uses a standard surface-mount footprint that reflows on a typical lead-free profile. The 1.27 mm pitch is layout-friendly — two-layer boards can route the six outputs without via congestion. No exposed thermal pad; the package relies on the leadframe and board copper for heat spreading.