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Texas Instruments PCA9554DBR — Interface & Transceivers

PCA9554DBR I²C 8-Bit I/O Expander, 400 kHz, 16-SSOP

MPNPCA9554DBR
Active

Texas Instruments PCA9554DBR, I²C/SMBus 8-bit I/O expander, 400 kHz clock frequency, 2.3 V to 5.5 V supply, push-pull outputs, interrupt output, -40°C to 85°C, 16-SSOP package.

$2.2500Ref. price · indicative, final on quote
Packaging16-SSOP (0.209", 5.30mm Width)
RoHSROHS3 Compliant
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

PCA9554DBR specifications
ParameterValue
Output typePush-Pull
MountingSurface Mount
Voltage2.3V ~ 5.5V
Current - output source (Sink)10mA, 25mA
Frequency400 kHz
InterfaceI²C, SMBus
Operating temperature-40°C~85°C
PackageTape & Reel (TR); Cut Tape (CT)
FeaturesPOR
Number of i (O)8
Case16-SSOP (0.209\", 5.30mm Width)
Interrupt outputYes

Product details

The PCA9554DBR is an 8-bit I²C/SMBus I/O expander from Texas Instruments that adds eight general-purpose I/O pins to a microcontroller via a two-wire serial bus. The I²C interface operates up to 400 kHz (fast-mode), and the push-pull outputs can source 10 mA or sink 25 mA per pin, enough to drive LEDs or small relays with external resistors.

16-SSOP — rework and layout notes

The 16-SSOP package (5.30 mm body width, 0.209" pitch) is a standard fine-pitch SOIC variant. It reflows well with a typical leaded profile; the 1.27 mm pitch leaves room for manual touch-up if needed. The POR (power-on reset) feature ensures the outputs default to a known state at power-up, which simplifies the firmware bring-up sequence.

Frequently asked questions

Is PCA9554DBR compatible with 3.3 V logic?

The I²C interface is standard 3.3 V compatible when the supply rail matches the host MCU.

Is PCA9554DBR obsolete or active?

PCA9554DBR is active with no end-of-life notice. It is ROHS3 compliant and suitable for new designs.

Does PCA9554DBR have an interrupt output?

Yes, it has an interrupt output that signals the host when an input pin changes state, reducing polling overhead on the I²C bus.