OMAPL138EZWTD4

Texas Instruments · OMAP-L1x Series

Texas Instruments OMAP-L1x series, OMAPL138EZWTD4, ARM926EJ-S + C674x DSP, 456 MHz, 361-NFBGA (16x16), industrial temp -40°C to 90°C, USB 1.1 & 2.0, SATA 3Gbps, Ethernet 10/100.

Texas Instruments OMAPL138EZWTD4
Download datasheet (PDF)
[IN STOCK] In Stock: 2 pcs
$44.05/ pc

Volume pricing

Buy Now

MOQ 1 · Tray · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

OMAPL138EZWTD4 specifications
Parameter / AttributeSpecification / Value
SeriesOMAP-L1x
MountingSurface Mount
Voltage - i (O)1.8V, 3.3V
Additional interfacesHPI, I²C, McASP, McBSP, MMC/SD, SPI, UART
Display & interface controllersLCD
Operating temperature-40°C ~ 90°C (TJ)
Number of cores (Bus width)1 Core, 32-Bit
USBUSB 1.1 + PHY (1), USB 2.0 + PHY (1)
SATASATA 3Gbps (1)
Speed456MHz
PackageTray
Ethernet10/100Mbps (1)
Core processorARM926EJ-S
Case361-LFBGA
RAM controllersSDRAM
Co-Processors (DSP)Signal Processing; C674x, System Control; CP15
Security featuresBoot Security, Cryptography
Graphics accelerationNo

Technical details

The Texas Instruments OMAPL138EZWTD4 is a dual-core applications processor combining an ARM926EJ-S core with a C674x floating-point DSP on a single die, running at 456 MHz. It belongs to the OMAP-L1x series and is aimed at industrial control, audio processing, medical imaging, and networked embedded systems where a mix of control code and real-time signal processing is needed. The part integrates dual USB ports (one USB 1.1 + PHY, one USB 2.0 + PHY), a SATA 3Gbps interface, and a 10/100 Mbps Ethernet MAC, along with a LCD controller and a comprehensive set of serial interfaces including I²C, SPI, UART, McASP, and McBSP.

The 456 MHz ARM926EJ-S core handles Linux or a lightweight RTOS for system control, networking stacks, and user interface tasks. The C674x DSP coprocessor offloads fixed- and floating-point math for audio codecs, motor-control algorithms, or real-time sensor fusion without stealing cycles from the ARM. The DSP has its own instruction and data caches and can be clocked independently, but the shared memory and peripheral bus require careful arbitration in the driver layer. If your application does not need the DSP, the ARM core alone still delivers competitive throughput for a 32-bit MPU at this speed grade.

Package and layout — 361-NFBGA

The ball pitch requires a multi-layer PCB with microvias or blind vias for fanout.

The part is ROHS3 compliant.

OMAPL138EZWTD4
[ALLOC] verified
Quote