MSP430FR2673TRHBR

Texas Instruments · MSP430™ FRAM Series

Texas Instruments MSP430™ FRAM series, MSP430FR2673TRHBR, 16-bit MCU, 16MHz, 16.5KB FRAM, 4K x 8 SRAM, 27 I/O, 8x12b SAR ADC, I²C/SPI/UART, 1.8V-3.6V, -40°C~105°C, 32-VFQFN exposed pad.

Texas Instruments MSP430FR2673TRHBR
Download datasheet (PDF)
[IN STOCK] In Stock: 87 pcs
$3.39/ pc

Volume pricing

Buy Now

MOQ 1 · Tape & Reel (TR); Cut Tape (CT) · RoHS · EIA-481 · DAP/DDP · T/T

Technical specifications

MSP430FR2673TRHBR specifications
Parameter / AttributeSpecification / Value
SeriesMSP430™ FRAM
MountingSurface Mount
Oscillator typeInternal
Program memory typeFRAM
Voltage - supply (Vcc (Vdd))1.8V ~ 3.6V
Operating temperature-40°C~105°C(TA)
Speed16MHz
PackageTape & Reel (TR); Cut Tape (CT)
RAM size4K x 8
Core size16-Bit
PeripheralsBrown-out Detect/Reset, POR, PWM, WDT
ConnectivityI²C, IrDA, SCI, SPI, UART/USART
Number of i (O)27
Core processorMSP430 CPU16
Case32-VFQFN Exposed Pad
Data convertersA/D 8x12b SAR
Program memory size16.5KB (16.5K x 8)

Technical details

FRAM-based 16-bit MCU for low-power sensing and control

FRAM replaces conventional Flash and EEPROM — it writes at bus speed without erase cycles, draws lower active and standby current, and unifies code and data storage in a single non-volatile space. This makes the part a natural fit for applications that log sensor data, maintain configuration across power cycles, or need field firmware updates without wearing out memory cells.

FRAM vs Flash — what the memory type means for your firmware strategy

FRAM writes at full bus speed — no erase-before-write penalty, no sector-erase wait states. For a control loop that logs 16-bit readings at 1 kHz, FRAM can store each sample in a single cycle without blocking the CPU. Flash-based MCUs at this price point typically require a 4 KB or 64 KB sector erase (several milliseconds) before rewriting any byte in that sector. The endurance difference is also practical: FRAM is rated for 10^15 write cycles per bit versus Flash's 10^4–10^5 cycles per sector. Wear-leveling firmware is optional here, not mandatory. The 16.5 KB FRAM array is split between code and data at compile time. There is no separate EEPROM block — the linker script defines the boundary.

Supply range and I/O — single-rail operation and peripheral mix

No secondary LDO needed for the core. The 27 I/O pins include the serial interface pins and ADC inputs, so a typical sensor node with I²C temperature sensor, SPI display, and UART debug port leaves enough GPIO for pushbuttons and LED indicators. The watchdog timer and PWM outputs cover basic motor drive or LED dimming without a separate timer IC.

Package and thermal — 32-VFQFN with exposed pad

The datasheet's recommended footprint shows a 3.2 mm × 3.2 mm solder-paste aperture on the pad with nine vias. Without those vias, junction temperature rises faster above 85°C ambient when running the ADC and serial interfaces simultaneously.

No last-time-buy notice has been issued. The part is ROHS3 compliant per the current revision. For new designs, this means no near-term supply discontinuity and no exemption expiry to track.

MSP430FR2673TRHBR
[ALLOC] verified
Quote