What the 25 MHz and 6x24b ADC mean for the BOM
25 MHz clock rate on a 16-bit RISC core handles voltage/current sample multiplication, phase compensation, and active/reactive power accumulation across three phases plus neutral. The six 24-bit sigma-delta converters include programmable gain amplifier and digital filter per channel, allowing direct connection of current transformers and voltage dividers without external analog front-end ICs.
Memory and peripheral budget
128 KB of Flash and 16 KB of RAM fit calibration constants, energy registers, communication buffers, and a Modbus RTU or DLMS/COSEM protocol stack. 62 I/O lines include LCD segment drive capability. Brown-out reset and power-on reset are integrated; the watchdog timer and DMA controller handle background data movement without CPU intervention.
