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Texas Instruments MSP430F67621IPZ — Microcontrollers & Processors (MCU / MPU / DSP)

MSP430F67621IPZ 16-bit MCU, 25 MHz, 64 KB Flash, 3x24b SD ADC

MPNMSP430F67621IPZ
End of Life

Texas Instruments MSP430F6xx series, 16-bit MSP430 CPUXV2 core at 25 MHz, 64 KB FLASH, 4 KB RAM, 3x24b sigma-delta + 8x10b SAR ADC, 72 I/O, 1.8-3.6 V supply, -40 to 85 °C, 100-LQFP (14x14 mm) tray.

$7.5657Ref. price · indicative, final on quote
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MOQ1 pcs
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Specifications

MSP430F67621IPZ Technical Specifications
ParameterValue
SeriesMSP430F6xx
Mounting typeSurface Mount
Oscillator typeInternal
Program memory typeFLASH
Voltage - supply (Vcc (Vdd))1.8V ~ 3.6V
Operating temperature-40°C~85°C(TA)
Speed25MHz
PackageTray
RAM size4K x 8
Core size16-Bit
PeripheralsBrown-out Detect/Reset, DMA, LCD, POR, PWM, WDT, 3x24b Sigma Delta Converter
ConnectivityI²C, IrDA, SPI, UART/USART
Number of i (O)72
Core processorMSP430 CPUXV2
Case100-LQFP
Data convertersA/D 8x10b
Program memory size64KB (64K x 8)

Product details

Three 24-bit sigma-delta ADCs — what that means for the BOM

Integration note — what the peripherals enable

The LCD driver supports segment displays common in panel meters and energy monitors. The DMA engine offloads data movement from the CPU, which matters when the sigma-delta ADCs are streaming samples at high rates. The internal oscillator eliminates an external crystal for many applications, though the I²C and SPI interfaces can still be clocked from an external source if tighter timing is needed. The 72 I/O pins provide enough headroom for a keypad, relay drivers, and communication isolation optocouplers without a port expander.

Frequently asked questions

What is the speed of MSP430F67621IPZ?

The MSP430F67621IPZ runs at 25 MHz, which is the maximum CPU clock for the MSP430 CPUXV2 core in this device.

What is MSP430F67621IPZ used for?

This MCU is designed for polyphase energy metering and precision measurement applications, leveraging its three 24-bit sigma-delta ADCs for simultaneous voltage and current sampling on multiple phases.