At 25 MHz the core can service a 24-bit sigma-delta conversion interrupt, update the LCD segment buffer, and still leave MIPS for the Modbus stack. The clock is fast enough to run the ADC at its full oversampling rate without dropping samples.
Integration note — the sigma-delta and LCD path
The 4x24b sigma-delta converter is the headline analog peripheral. Each channel can be configured for differential or single-ended input, with programmable gain and a digital filter that settles in a few conversion cycles.