64-DSBGA footprint and reflow reality
The MSP430F5526IYFFR comes in a 64-ball DSBGA (0.5 mm pitch) package — the same footprint as the 64-UFBGA variant. The 0.5 mm ball pitch demands a controlled impedance stack-up and a solder-mask-defined pad design; the stencil aperture should match the ball diameter to avoid bridging on the inner rows. MSL rating is not listed in the record, but DSBGA packages from TI typically carry MSL-1 or MSL-3 — check the lot date code before the reflow profile is locked. A bake at 125°C for 48 hours is cheap insurance if the floor life is uncertain.
25 MHz core with USB 2.0 — what the peripherals actually buy you
The MSP430 CPUXV2 core runs at 25 MHz — enough for real-time sensor fusion or USB packet handling without a separate USB controller. The 96 KB of Flash and 8 KB of RAM leave about 20 KB of Flash and 2 KB of RAM after a typical USB stack and RTOS footprint, so budget the application code tightly. On-chip USB 2.0 (full-speed) with integrated PHY means no external transceiver for HID or CDC class devices. The 12-bit ADC with 12 channels covers multi-sensor acquisition, and the DMA engine offloads data movement from the core during USB transfers.
Texas Instruments has marked the MSP430F5526IYFFR as Obsolete. For a BOM line that requires an active TI MSP430 with USB, the closest functional match is the MSP430F5529 series (same core, more Flash/RAM) but in a different package — a board spin is required. No pin-compatible drop-in exists from TI.