14-stage binary counter with oscillator
The MM74HC4060J is a 14-stage binary counter from the 74HC family, counting up on the negative edge of the clock input. Its 30 MHz count rate sets the upper timing boundary for the counter chain — the downstream logic must settle within one clock period, so the propagation delay of the next stage limits the practical cascade depth. The asynchronous reset forces all 14 outputs low regardless of the clock state, which is useful for initialising the counter on power-up or clearing the count on an external event without waiting for a clock edge.