100 MHz fixed-frequency oscillator — the clock-tree anchor
The Texas Instruments LMK60I2-100M00SIAR is a 100 MHz clock oscillator in a 6-SMD module, designed to provide a precise, fixed-frequency timing reference for digital systems. The 100 MHz output is the single defining parametric — it sets the clock rate for the downstream logic, FPGA fabric, or SERDES reference, and the rest of the spec sheet exists to confirm the oscillator can hold that frequency across its operating envelope.
Supply current and voltage tolerance — the rail design constraints
Drawing 95 mA from a 3.135 V to 3.465 V supply rail, this oscillator's current consumption is the dominant load on that rail in a typical clock-tree design. The 330 mV tolerance window means the rail must stay within 3.3 V ±5 % — a standard 3.3 V LDO or buck converter with 1 % set-point accuracy holds this easily, but a heavily loaded rail that droops under transient load may push the oscillator out of spec. At the 85°C end, the supply current may rise slightly, but the 95 mA figure is the maximum at 25°C — the actual thermal budget depends on the PCB copper area under the 6-QFM package's exposed pad.