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Texas Instruments LMK1D2106RHAR — Clock & Timing ICs

TI LMK1D2106RHAR Clock Buffer, 2 GHz, 2:6 Fanout, 40-VQFN

MPNLMK1D2106RHAR
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Texas Instruments LMK1D2106RHAR Clock Buffer, 2 GHz max frequency, 2:6 differential fanout, LVDS outputs, 40-VFQFN Exposed Pad package, Tape & Reel.

$8.1899Ref. price · indicative, final on quote
Texas Instruments LMK1D2106RHAR datasheet (PDF)
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LMK1D2106RHAR specifications
ParameterValue
TypeClock Buffer
MountingSurface Mount
Supply voltage1.71V ~ 1.89V, 2.375V ~ 2.625V, 3.135V ~ 3.465V
Frequency - max2 GHz
Operating temperature-40°C ~ 105°C (TA)
InputCML, HCSL, LVCMOS, LVDS, LVPECL
OutputClock, LVDS
PackageTape & Reel (TR)
Case40-VFQFN Exposed Pad
Number of circuits2
Ratio - Input:Output2:6
Differential - Input:OutputYes/Yes

Product details

2:6 LVDS fanout buffer — 2 GHz differential path

The LMK1D2106RHAR is a 2:6 clock buffer from Texas Instruments, accepting differential or single-ended inputs (CML, HCSL, LVCMOS, LVDS, LVPECL) and delivering six LVDS output copies. The 2 GHz maximum frequency covers the fastest reference clocks for SerDes, FPGA transceivers, and RF sampling converters — the buffer's additive jitter at that edge is the figure that determines whether the downstream PLL stays locked. Two independent fanout banks each take one input and distribute to three LVDS outputs, giving a total 2:6 ratio. The differential input-to-output path is fully differential (Yes/Yes), so the part preserves signal integrity across the fanout tree without converting to a single-ended rail internally.

Supply voltage and temperature range

The core and output rails share the same supply pin — the buffer operates from a single rail within any of these bands, so the board only needs one regulated voltage for the device.

40-VQFN package and board integration

Surface-mount package supplied in Tape & Reel, compatible with standard pick-and-place and reflow processes. The 0.5 mm pitch QFN demands a solder-paste stencil aperture that matches the datasheet footprint recommendation — the pad geometry affects both solder-joint reliability and thermal resistance.

Frequently asked questions

What input signal types does the LMK1D2106RHAR accept?

The buffer accepts CML, HCSL, LVCMOS, LVDS, and LVPECL inputs. This covers the common high-speed clock standards used with SerDes, FPGA reference clocks, and RF converters — no external level translation is needed for any of these families.

What is the maximum frequency of the LMK1D2106RHAR?

The maximum frequency is 2 GHz. At this speed the buffer distributes reference clocks for 25 Gbps SerDes, JESD204B ADC/DAC converters, and high-speed FPGA transceiver banks without adding significant jitter.