The LMK1D1204RGTT is a 2:4 clock buffer from Texas Instruments that accepts HCSL, LVCMOS, LVDS, or LVPECL inputs and delivers LVDS outputs up to 2 GHz. The 2:4 ratio means one active input fans out to four identical LVDS copies, with a second input available for redundancy or muxing — no extra level-shifting components needed on the front end. The 2 GHz max frequency covers PCIe Gen 4/5 reference clocks, 10G/25G Ethernet, and JESD204B SYSREF distribution.
Supply voltage flexibility and package footprint
The device runs from three supply ranges — 1.71V–1.89V, 2.375V–2.625V, and 3.135V–3.465V — so it can share a rail with 1.8V, 2.5V, or 3.3V logic without a dedicated LDO. The input:output ratio is 2:4, and both input and output paths are fully differential. The single-circuit design means one buffer channel per package — for higher fanout, cascade multiple devices or use a 1:4 fanout buffer with a larger ratio.
ROHS3 compliance covers the full bill of materials — no exemption-based paperwork needed for EU markets.
Comparison with the LVPECL sibling CDCLVP1204RGTR
The closest functional peer is the CDCLVP1204RGTR, which also offers a 2:4 fanout at 2 GHz but outputs LVPECL instead of LVDS. The LMK1D1204RGTT uses LVDS outputs, which typically consume less power and have a smaller voltage swing than LVPECL, making it a better fit for low-voltage or power-sensitive clock trees.