The Texas Instruments LMK1D1204PRHDR is a 2:4 differential clock buffer designed to fan out a single high-speed clock input to four outputs with minimal additive jitter. It accepts a differential clock input and delivers four differential clock outputs, all rated to 2 GHz, making it suitable for distributing reference clocks in networking, telecom, and data-converter systems where phase noise and skew matter. The buffer operates across three supply voltage ranges — 1.71 V to 1.89 V, 2.375 V to 2.625 V, and 3.135 V to 3.465 V — so it can sit on a 1.8 V, 2.5 V, or 3.3 V rail without a level translator.
2 GHz differential path — what the frequency rating means for the signal chain
A 2 GHz max frequency means this buffer can handle 10 GbE reference clocks, JESD204B SYSREF signals up to the full rate, and high-speed ADC/DAC sampling clocks without rolling off the edge rate. The differential input and output (Yes/Yes per the spec) reject common-mode noise coupled onto the clock trace, which is critical when the clock distribution runs across a noisy digital board. Because the part is a buffer, not a PLL, it does not clean up jitter — it preserves the input phase noise floor. The buyer should pair it with a clean oscillator source and keep the supply decoupling tight, especially on the 1.8 V rail where PSRR tends to be lower.
Package, footprint, and thermal considerations for the 28-VQFN
The LMK1D1204PRHDR comes in a 28-pin VQFN with an exposed thermal pad (5 mm × 5 mm body). At 2 GHz fanning out four differential pairs, the junction temperature stays well within limits if the pad is properly stitched. The surface-mount package is MSL-rated (ROHS3 compliant per the listing), so standard reflow profiles work; the exposed pad also helps with ground return inductance for the high-speed outputs.
There is no NRND notice, no last-time-buy window, and no announced end-of-life. That makes it a safe selection for production BOMs that need to stay in the field for five to ten years.