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Texas Instruments LMK04111SQE/NOPB — Clock & Timing ICs

LMK04111SQE/NOPB PLLatinum™ Clock Jitter Cleaner, 1.08 GHz

MPNLMK04111SQE/NOPB
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Texas Instruments PLLatinum™ LMK04111SQE/NOPB clock jitter cleaner, PLL Yes, 1.08 GHz max frequency, LVCMOS/LVDS/LVPECL input, 2VPECL/LVPECL output, 3.15V–3.45V supply, -40°C to 85°C, 48-WQFN (7x7).

$9.3900Ref. price · indicative, final on quote
Packaging48-WFQFN Exposed Pad
SeriesPLLatinum™
Independent supplier — new & surplus stockAuthenticity-screened · ESD-safe packingListing updated Aug 2026

Specifications

LMK04111SQE/NOPB specifications
ParameterValue
SeriesPLLatinum™
MountingSurface Mount
Supply voltage3.15V ~ 3.45V
Frequency - max1.08GHz
Operating temperature-40°C~85°C
PLLYes
InputLVCMOS, LVDS, LVPECL
Output2VPECL, LVPECL
PackageTape & Reel (TR)
Case48-WFQFN Exposed Pad
Divider (Multiplier)Yes/No
Number of circuits1
Ratio - Input:Output2:5
Differential - Input:OutputYes/Yes

Product details

Clock jitter cleaner for high-speed signal chains

The Texas Instruments LMK04111SQE/NOPB is a PLLatinum™ clock jitter cleaner. It accepts LVCMOS, LVDS, or LVPECL inputs and delivers LVPECL outputs at frequencies up to 1.08 GHz. The part operates from a 3.15 V to 3.45 V supply and is specified over -40°C to 85°C.

The 1.08 GHz maximum output frequency covers common ADC/DAC sampling clocks and SerDes reference frequencies. If the target clock rate exceeds 1.08 GHz, a different PLL or a frequency multiplier stage is needed downstream.

Input and output signal compatibility

The input stage accepts LVCMOS, LVDS, and LVPECL levels. The outputs are LVPECL, a differential standard that provides good noise immunity for routing across a PCB to a data converter or FPGA clock input.

Industrial temperature grade — deployment envelope

It is not rated for extended automotive under-hood or military/aerospace environments.

Frequently asked questions

What is the input frequency range of LMK04111?

The evidence lists the maximum output frequency as 1.08 GHz but does not specify the input frequency range. The input accepts LVCMOS, LVDS, and LVPECL levels. For the full input frequency specification, refer to the datasheet.